The Parasitic Extraction tool is used by netlisters and other parts of the system that need to know about geometric factors. To control Parasitic Extraction, use the "Parasitic" preferences (in menu File / Preferences..., "Tools" section, "Parasitic" tab).

Each layer of the current technology is listed, and you can set its unit resistance, area capacitance, and edge capacitance. In addition, you can set minimum resistance and capacitance values for the entire technology.

The bottom section controls values for the entire technology. You can set the minimum resistance and capacitance for the entire technology. The "Gate Length Shrink" is a compensation factor for gate lengths. Some process technologies shrink the gate length by a fixed amount. "Include Gate In Resistance" requests that a transistor's gate area be included in overall area calculations for resistance determination. "Include Ground Network" requests that ground networks be analyzed.