Electric can compare two different cells and determine whether their networks have the same topology. This operation is sometimes called Layout vs. Schematic (LVS), but because Electric can compare any two circuits (including two layouts or two schematics) we use the term Network Consistency Checking (NCC).

The Java Electric NCC differs from the C Electric NCC in two significant ways.

- The Java Electric NCC firsts attempts to discover circuit mismatches using a new algorithm called "Local Partitioning". We do this because Local Partitioning provides much more precise and intelligible mismatch diagnostics. We fall back upon the Gemini algorithm (Ebeling, Carl, "GeminiII: A Second Generation Layout Validation Program", Proceedings of ICCAD 1988, p322-325.) only as a last resort. In practice upwards of 95% of all errors are found by Local Partitioning.
- The Java Electric NCC has a "hierarchical" mode. When comparing a cell hierarchically, NCC first tries to compare the cell's descendents. We strongly recommend this mode to the user because it allows the Local Partitioning algorithm to provide even more precise and intelligible mismatch diagnostics.

The Java Electric NCC is also significantly faster than the C Electric NCC. For example, for one of our chips, C-NCC flat took 48 minutes, Java-NCC flat took 3.5 minutes, and Java-NCC hierarchical took 9 seconds.

### Limitations

NCC has a number of limitations

- NCC does not check the substrate connection of transistors. This is because Electric does not keep track of the connectivity of the substrate connection of layout transistors. In fact, layout transistors don't have substrate ports. We plan to remedy this.

### Example

For an example of network consistency checking, open the Samples library with the Sample Cells command (in menu Help / Load Built-in Libraries) and compare the cells "tool-NCC{lay}" and "tool-NCC{sch}". These two cells are equivalent and the checker will find them to be so.