[−][src]Module core::arch::arm

🔬 This is a nightly-only experimental API. (stdsimd #27731)
This is supported on ARM only.

Platform-specific intrinsics for the arm platform.

See the module documentation for more details.

Structs

ISHExperimentalARM

Inner Shareable is the required shareability domain, reads and writes are the required access types

ISHLDExperimentalARM

Inner Shareable is the required shareability domain, reads are the required access type

ISHSTExperimentalARM

Inner Shareable is the required shareability domain, writes are the required access type

LDExperimentalARM

Full system is the required shareability domain, reads are the required access type

NSHExperimentalARM

Non-shareable is the required shareability domain, reads and writes are the required access types

NSHLDExperimentalARM

Non-shareable is the required shareability domain, reads are the required access type

NSHSTExperimentalARM

Non-shareable is the required shareability domain, writes are the required access type

OSHExperimentalARM

Outer Shareable is the required shareability domain, reads and writes are the required access types

OSHLDExperimentalARM

Outher Shareable is the required shareability domain, reads are the required access type

OSHSTExperimentalARM

Outer Shareable is the required shareability domain, writes are the required access type

STExperimentalARM

Full system is the required shareability domain, writes are the required access type

SYExperimentalARM

Full system is the required shareability domain, reads and writes are the required access types

float32x2_tExperimentalARM

ARM-specific 64-bit wide vector of two packed f32.

float32x4_tExperimentalARM

ARM-specific 128-bit wide vector of four packed f32.

int8x8_tExperimentalARM

ARM-specific 64-bit wide vector of eight packed i8.

int8x8x2_tExperimentalARM

ARM-specific type containing two int8x8_t vectors.

int8x8x3_tExperimentalARM

ARM-specific type containing three int8x8_t vectors.

int8x8x4_tExperimentalARM

ARM-specific type containing four int8x8_t vectors.

int8x16_tExperimentalARM

ARM-specific 128-bit wide vector of sixteen packed i8.

int16x4_tExperimentalARM

ARM-specific 64-bit wide vector of four packed i16.

int16x8_tExperimentalARM

ARM-specific 128-bit wide vector of eight packed i16.

int32x2_tExperimentalARM

ARM-specific 64-bit wide vector of two packed i32.

int32x4_tExperimentalARM

ARM-specific 128-bit wide vector of four packed i32.

int64x1_tExperimentalARM

ARM-specific 64-bit wide vector of one packed i64.

int64x2_tExperimentalARM

ARM-specific 128-bit wide vector of two packed i64.

poly8x8_tExperimentalARM

ARM-specific 64-bit wide polynomial vector of eight packed u8.

poly8x8x2_tExperimentalARM

ARM-specific type containing two poly8x8_t vectors.

poly8x8x3_tExperimentalARM

ARM-specific type containing three poly8x8_t vectors.

poly8x8x4_tExperimentalARM

ARM-specific type containing four poly8x8_t vectors.

poly8x16_tExperimentalARM

ARM-specific 128-bit wide vector of sixteen packed u8.

poly16x4_tExperimentalARM

ARM-specific 64-bit wide vector of four packed u16.

poly16x8_tExperimentalARM

ARM-specific 128-bit wide vector of eight packed u16.

uint8x8_tExperimentalARM

ARM-specific 64-bit wide vector of eight packed u8.

uint8x8x2_tExperimentalARM

ARM-specific type containing two uint8x8_t vectors.

uint8x8x3_tExperimentalARM

ARM-specific type containing three uint8x8_t vectors.

uint8x8x4_tExperimentalARM

ARM-specific type containing four uint8x8_t vectors.

uint8x16_tExperimentalARM

ARM-specific 128-bit wide vector of sixteen packed u8.

uint16x4_tExperimentalARM

ARM-specific 64-bit wide vector of four packed u16.

uint16x8_tExperimentalARM

ARM-specific 128-bit wide vector of eight packed u16.

uint32x2_tExperimentalARM

ARM-specific 64-bit wide vector of two packed u32.

uint32x4_tExperimentalARM

ARM-specific 128-bit wide vector of four packed u32.

uint64x1_tExperimentalARM

ARM-specific 64-bit wide vector of one packed u64.

uint64x2_tExperimentalARM

ARM-specific 128-bit wide vector of two packed u64.

Functions

__breakpoint⚠ExperimentalARM

Inserts a breakpoint instruction.

__crc32b⚠ExperimentalARM and crc

CRC32 single round checksum for bytes (8 bits).

__crc32cb⚠ExperimentalARM and crc

CRC32-C single round checksum for bytes (8 bits).

__crc32ch⚠ExperimentalARM and crc

CRC32-C single round checksum for half words (16 bits).

__crc32cw⚠ExperimentalARM and crc

CRC32-C single round checksum for words (32 bits).

__crc32h⚠ExperimentalARM and crc

CRC32 single round checksum for half words (16 bits).

__crc32w⚠ExperimentalARM and crc

CRC32 single round checksum for words (32 bits).

__dmb⚠ExperimentalARM

Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.

__dsb⚠ExperimentalARM

Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.

__isb⚠ExperimentalARM

Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.

__nop⚠ExperimentalARM

Generates an unspecified no-op instruction.

__rsr⚠ExperimentalARM

Reads a 32-bit system register

__rsr64⚠ExperimentalARM

Reads a 64-bit system register

__rsrp⚠ExperimentalARM

Reads a system register containing an address

__sev⚠ExperimentalARM

Generates a SEV (send a global event) hint instruction.

__sevl⚠ExperimentalARM

Generates a send a local event hint instruction.

__wfe⚠ExperimentalARM

Generates a WFE (wait for event) hint instruction, or nothing.

__wfi⚠ExperimentalARM

Generates a WFI (wait for interrupt) hint instruction, or nothing.

__wsr⚠ExperimentalARM

Writes a 32-bit system register

__wsr64⚠ExperimentalARM

Writes a 64-bit system register

__wsrp⚠ExperimentalARM

Writes a system register containing an address

__yield⚠ExperimentalARM

Generates a YIELD hint instruction.

_clz_u8⚠ExperimentalARM

Count Leading Zeros.

_clz_u16⚠ExperimentalARM

Count Leading Zeros.

_clz_u32⚠ExperimentalARM

Count Leading Zeros.

_rbit_u32⚠ExperimentalARM

Reverse the bit order.

_rev_u16⚠ExperimentalARM

Reverse the order of the bytes.

_rev_u32⚠ExperimentalARM

Reverse the order of the bytes.

vabs_s8⚠ExperimentalARM and neon

Absolute value (wrapping).

vabs_s16⚠ExperimentalARM and neon

Absolute value (wrapping).

vabs_s32⚠ExperimentalARM and neon

Absolute value (wrapping).

vabsq_s8⚠ExperimentalARM and neon

Absolute value (wrapping).

vabsq_s16⚠ExperimentalARM and neon

Absolute value (wrapping).

vabsq_s32⚠ExperimentalARM and neon

Absolute value (wrapping).

vadd_f32⚠ExperimentalARM and neon

Vector add.

vadd_s8⚠ExperimentalARM and neon

Vector add.

vadd_s16⚠ExperimentalARM and neon

Vector add.

vadd_s32⚠ExperimentalARM and neon

Vector add.

vadd_u8⚠ExperimentalARM and neon

Vector add.

vadd_u16⚠ExperimentalARM and neon

Vector add.

vadd_u32⚠ExperimentalARM and neon

Vector add.

vaddl_s8⚠ExperimentalARM and neon

Vector long add.

vaddl_s16⚠ExperimentalARM and neon

Vector long add.

vaddl_s32⚠ExperimentalARM and neon

Vector long add.

vaddl_u8⚠ExperimentalARM and neon

Vector long add.

vaddl_u16⚠ExperimentalARM and neon

Vector long add.

vaddl_u32⚠ExperimentalARM and neon

Vector long add.

vaddq_f32⚠ExperimentalARM and neon

Vector add.

vaddq_s8⚠ExperimentalARM and neon

Vector add.

vaddq_s16⚠ExperimentalARM and neon

Vector add.

vaddq_s32⚠ExperimentalARM and neon

Vector add.

vaddq_s64⚠ExperimentalARM and neon

Vector add.

vaddq_u8⚠ExperimentalARM and neon

Vector add.

vaddq_u16⚠ExperimentalARM and neon

Vector add.

vaddq_u32⚠ExperimentalARM and neon

Vector add.

vaddq_u64⚠ExperimentalARM and neon

Vector add.

vand_s8⚠ExperimentalARM and neon

Vector bitwise and

vand_s16⚠ExperimentalARM and neon

Vector bitwise and

vand_s32⚠ExperimentalARM and neon

Vector bitwise and

vand_s64⚠ExperimentalARM and neon

Vector bitwise and

vand_u8⚠ExperimentalARM and neon

Vector bitwise and

vand_u16⚠ExperimentalARM and neon

Vector bitwise and

vand_u32⚠ExperimentalARM and neon

Vector bitwise and

vand_u64⚠ExperimentalARM and neon

Vector bitwise and

vandq_s8⚠ExperimentalARM and neon

Vector bitwise and

vandq_s16⚠ExperimentalARM and neon

Vector bitwise and

vandq_s32⚠ExperimentalARM and neon

Vector bitwise and

vandq_s64⚠ExperimentalARM and neon

Vector bitwise and

vandq_u8⚠ExperimentalARM and neon

Vector bitwise and

vandq_u16⚠ExperimentalARM and neon

Vector bitwise and

vandq_u32⚠ExperimentalARM and neon

Vector bitwise and

vandq_u64⚠ExperimentalARM and neon

Vector bitwise and

vceq_f32⚠ExperimentalARM and neon

Floating-point compare equal

vceq_s8⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceq_s16⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceq_s32⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceq_u8⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceq_u16⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceq_u32⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceqq_f32⚠ExperimentalARM and neon

Floating-point compare equal

vceqq_s8⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceqq_s16⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceqq_s32⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceqq_u8⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceqq_u16⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vceqq_u32⚠ExperimentalARM and neon

Compare bitwise Equal (vector)

vcge_f32⚠ExperimentalARM and neon

Floating-point compare greater than or equal

vcge_s8⚠ExperimentalARM and neon

Compare signed greater than or equal

vcge_s16⚠ExperimentalARM and neon

Compare signed greater than or equal

vcge_s32⚠ExperimentalARM and neon

Compare signed greater than or equal

vcge_u8⚠ExperimentalARM and neon

Compare unsigned greater than or equal

vcge_u16⚠ExperimentalARM and neon

Compare unsigned greater than or equal

vcge_u32⚠ExperimentalARM and neon

Compare unsigned greater than or equal

vcgeq_f32⚠ExperimentalARM and neon

Floating-point compare greater than or equal

vcgeq_s8⚠ExperimentalARM and neon

Compare signed greater than or equal

vcgeq_s16⚠ExperimentalARM and neon

Compare signed greater than or equal

vcgeq_s32⚠ExperimentalARM and neon

Compare signed greater than or equal

vcgeq_u8⚠ExperimentalARM and neon

Compare unsigned greater than or equal

vcgeq_u16⚠ExperimentalARM and neon

Compare unsigned greater than or equal

vcgeq_u32⚠ExperimentalARM and neon

Compare unsigned greater than or equal

vcgt_f32⚠ExperimentalARM and neon

Floating-point compare greater than

vcgt_s8⚠ExperimentalARM and neon

Compare signed greater than

vcgt_s16⚠ExperimentalARM and neon

Compare signed greater than

vcgt_s32⚠ExperimentalARM and neon

Compare signed greater than

vcgt_u8⚠ExperimentalARM and neon

Compare unsigned highe

vcgt_u16⚠ExperimentalARM and neon

Compare unsigned highe

vcgt_u32⚠ExperimentalARM and neon

Compare unsigned highe

vcgtq_f32⚠ExperimentalARM and neon

Floating-point compare greater than

vcgtq_s8⚠ExperimentalARM and neon

Compare signed greater than

vcgtq_s16⚠ExperimentalARM and neon

Compare signed greater than

vcgtq_s32⚠ExperimentalARM and neon

Compare signed greater than

vcgtq_u8⚠ExperimentalARM and neon

Compare unsigned highe

vcgtq_u16⚠ExperimentalARM and neon

Compare unsigned highe

vcgtq_u32⚠ExperimentalARM and neon

Compare unsigned highe

vcle_f32⚠ExperimentalARM and neon

Floating-point compare less than or equal

vcle_s8⚠ExperimentalARM and neon

Compare signed less than or equal

vcle_s16⚠ExperimentalARM and neon

Compare signed less than or equal

vcle_s32⚠ExperimentalARM and neon

Compare signed less than or equal

vcle_u8⚠ExperimentalARM and neon

Compare unsigned less than or equal

vcle_u16⚠ExperimentalARM and neon

Compare unsigned less than or equal

vcle_u32⚠ExperimentalARM and neon

Compare unsigned less than or equal

vcleq_f32⚠ExperimentalARM and neon

Floating-point compare less than or equal

vcleq_s8⚠ExperimentalARM and neon

Compare signed less than or equal

vcleq_s16⚠ExperimentalARM and neon

Compare signed less than or equal

vcleq_s32⚠ExperimentalARM and neon

Compare signed less than or equal

vcleq_u8⚠ExperimentalARM and neon

Compare unsigned less than or equal

vcleq_u16⚠ExperimentalARM and neon

Compare unsigned less than or equal

vcleq_u32⚠ExperimentalARM and neon

Compare unsigned less than or equal

vclt_f32⚠ExperimentalARM and neon

Floating-point compare less than

vclt_s8⚠ExperimentalARM and neon

Compare signed less than

vclt_s16⚠ExperimentalARM and neon

Compare signed less than

vclt_s32⚠ExperimentalARM and neon

Compare signed less than

vclt_u8⚠ExperimentalARM and neon

Compare unsigned less than

vclt_u16⚠ExperimentalARM and neon

Compare unsigned less than

vclt_u32⚠ExperimentalARM and neon

Compare unsigned less than

vcltq_f32⚠ExperimentalARM and neon

Floating-point compare less than

vcltq_s8⚠ExperimentalARM and neon

Compare signed less than

vcltq_s16⚠ExperimentalARM and neon

Compare signed less than

vcltq_s32⚠ExperimentalARM and neon

Compare signed less than

vcltq_u8⚠ExperimentalARM and neon

Compare unsigned less than

vcltq_u16⚠ExperimentalARM and neon

Compare unsigned less than

vcltq_u32⚠ExperimentalARM and neon

Compare unsigned less than

vdupq_n_s8⚠ExperimentalARM and neon

Duplicate vector element to vector or scalar

vdupq_n_u8⚠ExperimentalARM and neon

Duplicate vector element to vector or scalar

veor_s8⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veor_s16⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veor_s32⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veor_s64⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veor_u8⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veor_u16⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veor_u32⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veor_u64⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_s8⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_s16⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_s32⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_s64⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_u8⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_u16⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_u32⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

veorq_u64⚠ExperimentalARM and neon

Vector bitwise exclusive or (vector)

vextq_s8⚠ExperimentalARM and neon

Extract vector from pair of vectors

vextq_u8⚠ExperimentalARM and neon

Extract vector from pair of vectors

vget_lane_u8⚠ExperimentalARM and neon

Move vector element to general-purpose register

vget_lane_u64⚠ExperimentalARM and neon

Move vector element to general-purpose register

vgetq_lane_u16⚠ExperimentalARM and neon

Move vector element to general-purpose register

vgetq_lane_u32⚠ExperimentalARM and neon

Move vector element to general-purpose register

vgetq_lane_u64⚠ExperimentalARM and neon

Move vector element to general-purpose register

vhadd_s8⚠ExperimentalARM and neon

Halving add

vhadd_s16⚠ExperimentalARM and neon

Halving add

vhadd_s32⚠ExperimentalARM and neon

Halving add

vhadd_u8⚠ExperimentalARM and neon

Halving add

vhadd_u16⚠ExperimentalARM and neon

Halving add

vhadd_u32⚠ExperimentalARM and neon

Halving add

vhaddq_s8⚠ExperimentalARM and neon

Halving add

vhaddq_s16⚠ExperimentalARM and neon

Halving add

vhaddq_s32⚠ExperimentalARM and neon

Halving add

vhaddq_u8⚠ExperimentalARM and neon

Halving add

vhaddq_u16⚠ExperimentalARM and neon

Halving add

vhaddq_u32⚠ExperimentalARM and neon

Halving add

vhsub_s8⚠ExperimentalARM and neon

Signed halving subtract

vhsub_s16⚠ExperimentalARM and neon

Signed halving subtract

vhsub_s32⚠ExperimentalARM and neon

Signed halving subtract

vhsub_u8⚠ExperimentalARM and neon

Signed halving subtract

vhsub_u16⚠ExperimentalARM and neon

Signed halving subtract

vhsub_u32⚠ExperimentalARM and neon

Signed halving subtract

vhsubq_s8⚠ExperimentalARM and neon

Signed halving subtract

vhsubq_s16⚠ExperimentalARM and neon

Signed halving subtract

vhsubq_s32⚠ExperimentalARM and neon

Signed halving subtract

vhsubq_u8⚠ExperimentalARM and neon

Signed halving subtract

vhsubq_u16⚠ExperimentalARM and neon

Signed halving subtract

vhsubq_u32⚠ExperimentalARM and neon

Signed halving subtract

vld1q_s8⚠ExperimentalARM and neon

Load multiple single-element structures to one, two, three, or four registers

vld1q_u8⚠ExperimentalARM and neon

Load multiple single-element structures to one, two, three, or four registers

vmovl_s8⚠ExperimentalARM and neon

Vector long move.

vmovl_s16⚠ExperimentalARM and neon

Vector long move.

vmovl_s32⚠ExperimentalARM and neon

Vector long move.

vmovl_u8⚠ExperimentalARM and neon

Vector long move.

vmovl_u16⚠ExperimentalARM and neon

Vector long move.

vmovl_u32⚠ExperimentalARM and neon

Vector long move.

vmovn_s16⚠ExperimentalARM and neon

Vector narrow integer.

vmovn_s32⚠ExperimentalARM and neon

Vector narrow integer.

vmovn_s64⚠ExperimentalARM and neon

Vector narrow integer.

vmovn_u16⚠ExperimentalARM and neon

Vector narrow integer.

vmovn_u32⚠ExperimentalARM and neon

Vector narrow integer.

vmovn_u64⚠ExperimentalARM and neon

Vector narrow integer.

vmovq_n_u8⚠ExperimentalARM and neon

Duplicate vector element to vector or scalar

vmul_f32⚠ExperimentalARM and neon

Multiply

vmul_s8⚠ExperimentalARM and neon

Multiply

vmul_s16⚠ExperimentalARM and neon

Multiply

vmul_s32⚠ExperimentalARM and neon

Multiply

vmul_u8⚠ExperimentalARM and neon

Multiply

vmul_u16⚠ExperimentalARM and neon

Multiply

vmul_u32⚠ExperimentalARM and neon

Multiply

vmulq_f32⚠ExperimentalARM and neon

Multiply

vmulq_s8⚠ExperimentalARM and neon

Multiply

vmulq_s16⚠ExperimentalARM and neon

Multiply

vmulq_s32⚠ExperimentalARM and neon

Multiply

vmulq_u8⚠ExperimentalARM and neon

Multiply

vmulq_u16⚠ExperimentalARM and neon

Multiply

vmulq_u32⚠ExperimentalARM and neon

Multiply

vmvn_p8⚠ExperimentalARM and neon

Vector bitwise not.

vmvn_s8⚠ExperimentalARM and neon

Vector bitwise not.

vmvn_s16⚠ExperimentalARM and neon

Vector bitwise not.

vmvn_s32⚠ExperimentalARM and neon

Vector bitwise not.

vmvn_u8⚠ExperimentalARM and neon

Vector bitwise not.

vmvn_u16⚠ExperimentalARM and neon

Vector bitwise not.

vmvn_u32⚠ExperimentalARM and neon

Vector bitwise not.

vmvnq_p8⚠ExperimentalARM and neon

Vector bitwise not.

vmvnq_s8⚠ExperimentalARM and neon

Vector bitwise not.

vmvnq_s16⚠ExperimentalARM and neon

Vector bitwise not.

vmvnq_s32⚠ExperimentalARM and neon

Vector bitwise not.

vmvnq_u8⚠ExperimentalARM and neon

Vector bitwise not.

vmvnq_u16⚠ExperimentalARM and neon

Vector bitwise not.

vmvnq_u32⚠ExperimentalARM and neon

Vector bitwise not.

vorr_s8⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorr_s16⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorr_s32⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorr_s64⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorr_u8⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorr_u16⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorr_u32⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorr_u64⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_s8⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_s16⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_s32⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_s64⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_u8⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_u16⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_u32⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vorrq_u64⚠ExperimentalARM and neon

Vector bitwise or (immediate, inclusive)

vpmax_f32⚠ExperimentalARM and neon

Folding maximum of adjacent pairs

vpmax_s8⚠ExperimentalARM and neon

Folding maximum of adjacent pairs

vpmax_s16⚠ExperimentalARM and neon

Folding maximum of adjacent pairs

vpmax_s32⚠ExperimentalARM and neon

Folding maximum of adjacent pairs

vpmax_u8⚠ExperimentalARM and neon

Folding maximum of adjacent pairs

vpmax_u16⚠ExperimentalARM and neon

Folding maximum of adjacent pairs

vpmax_u32⚠ExperimentalARM and neon

Folding maximum of adjacent pairs

vpmin_f32⚠ExperimentalARM and neon

Folding minimum of adjacent pairs

vpmin_s8⚠ExperimentalARM and neon

Folding minimum of adjacent pairs

vpmin_s16⚠ExperimentalARM and neon

Folding minimum of adjacent pairs

vpmin_s32⚠ExperimentalARM and neon

Folding minimum of adjacent pairs

vpmin_u8⚠ExperimentalARM and neon

Folding minimum of adjacent pairs

vpmin_u16⚠ExperimentalARM and neon

Folding minimum of adjacent pairs

vpmin_u32⚠ExperimentalARM and neon

Folding minimum of adjacent pairs

vqadd_s8⚠ExperimentalARM and neon

Saturating add

vqadd_s16⚠ExperimentalARM and neon

Saturating add

vqadd_s32⚠ExperimentalARM and neon

Saturating add

vqadd_u8⚠ExperimentalARM and neon

Saturating add

vqadd_u16⚠ExperimentalARM and neon

Saturating add

vqadd_u32⚠ExperimentalARM and neon

Saturating add

vqaddq_s8⚠ExperimentalARM and neon

Saturating add

vqaddq_s16⚠ExperimentalARM and neon

Saturating add

vqaddq_s32⚠ExperimentalARM and neon

Saturating add

vqaddq_u8⚠ExperimentalARM and neon

Saturating add

vqaddq_u16⚠ExperimentalARM and neon

Saturating add

vqaddq_u32⚠ExperimentalARM and neon

Saturating add

vqmovn_u64⚠ExperimentalARM and neon

Unsigned saturating extract narrow.

vqsub_s8⚠ExperimentalARM and neon

Saturating subtract

vqsub_s16⚠ExperimentalARM and neon

Saturating subtract

vqsub_s32⚠ExperimentalARM and neon

Saturating subtract

vqsub_u8⚠ExperimentalARM and neon

Saturating subtract

vqsub_u16⚠ExperimentalARM and neon

Saturating subtract

vqsub_u32⚠ExperimentalARM and neon

Saturating subtract

vqsubq_s8⚠ExperimentalARM and neon

Saturating subtract

vqsubq_s16⚠ExperimentalARM and neon

Saturating subtract

vqsubq_s32⚠ExperimentalARM and neon

Saturating subtract

vqsubq_u8⚠ExperimentalARM and neon

Saturating subtract

vqsubq_u16⚠ExperimentalARM and neon

Saturating subtract

vqsubq_u32⚠ExperimentalARM and neon

Saturating subtract

vreinterpret_u64_u32⚠ExperimentalARM and neon

Vector reinterpret cast operation

vreinterpretq_s8_u8⚠ExperimentalARM and neon

Vector reinterpret cast operation

vreinterpretq_u8_s8⚠ExperimentalARM and neon

Vector reinterpret cast operation

vreinterpretq_u16_u8⚠ExperimentalARM and neon

Vector reinterpret cast operation

vreinterpretq_u32_u8⚠ExperimentalARM and neon

Vector reinterpret cast operation

vreinterpretq_u64_u8⚠ExperimentalARM and neon

Vector reinterpret cast operation

vrhadd_s8⚠ExperimentalARM and neon

Rounding halving add

vrhadd_s16⚠ExperimentalARM and neon

Rounding halving add

vrhadd_s32⚠ExperimentalARM and neon

Rounding halving add

vrhadd_u8⚠ExperimentalARM and neon

Rounding halving add

vrhadd_u16⚠ExperimentalARM and neon

Rounding halving add

vrhadd_u32⚠ExperimentalARM and neon

Rounding halving add

vrhaddq_s8⚠ExperimentalARM and neon

Rounding halving add

vrhaddq_s16⚠ExperimentalARM and neon

Rounding halving add

vrhaddq_s32⚠ExperimentalARM and neon

Rounding halving add

vrhaddq_u8⚠ExperimentalARM and neon

Rounding halving add

vrhaddq_u16⚠ExperimentalARM and neon

Rounding halving add

vrhaddq_u32⚠ExperimentalARM and neon

Rounding halving add

vrsqrte_f32⚠ExperimentalARM and neon

Reciprocal square-root estimate.

vshlq_n_u8⚠ExperimentalARM and neon

Shift right

vshrq_n_u8⚠ExperimentalARM and neon

Unsigned shift right

vsub_f32⚠ExperimentalARM and neon

Subtract

vsub_s8⚠ExperimentalARM and neon

Subtract

vsub_s16⚠ExperimentalARM and neon

Subtract

vsub_s32⚠ExperimentalARM and neon

Subtract

vsub_s64⚠ExperimentalARM and neon

Subtract

vsub_u8⚠ExperimentalARM and neon

Subtract

vsub_u16⚠ExperimentalARM and neon

Subtract

vsub_u32⚠ExperimentalARM and neon

Subtract

vsub_u64⚠ExperimentalARM and neon

Subtract

vsubq_f32⚠ExperimentalARM and neon

Subtract

vsubq_s8⚠ExperimentalARM and neon

Subtract

vsubq_s16⚠ExperimentalARM and neon

Subtract

vsubq_s32⚠ExperimentalARM and neon

Subtract

vsubq_s64⚠ExperimentalARM and neon

Subtract

vsubq_u8⚠ExperimentalARM and neon

Subtract

vsubq_u16⚠ExperimentalARM and neon

Subtract

vsubq_u32⚠ExperimentalARM and neon

Subtract

vsubq_u64⚠ExperimentalARM and neon

Subtract