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<A HREF="tseng.html"><EM> Information for Tseng Chipset Users</EM></A>
 <b>:</b> <EM>ET6000 memory bandwidth hype and the impact on video modes </EM><BR>
<b>Previous:</b> <A HREF="tseng12.html"><EM>ET6000 memory size facts and fiction </EM></A><BR>
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  <H2><A NAME="20"></A>13. ET6000 memory bandwidth hype and the impact on video modes </H2>

<p>Tseng has always had wet dreams about memory bandwidth, and their press
announcements about the ET6000 memory bandwidth are no exception.</p>
<p>They claim the ET6000 using MDRAM is capable of reaching an incredible 1.2
Gbytes/sec of bandwidth. That would surpass just about everything on the
market (even SGI).</p>
<p>And that would be true, _if_ they actually used the fastest available MDRAMs
on their boards, which they don't. The stunning 1.2 GByte mark is only
reached when using 4 MDRAM chips at their max clock rate of 166 MHz. But due
to design limitations, the first-generation ET6000 can only drive the
memories at 92 MHz (that will change when the ET6100 and ET6300 hit the
streets).</p>
<p>This means the max. theoretical bandwidth available on current ET6000 boards is "only"
360 MB/sec on boards with 2 MDRAM chips, and 720 MB/sec on boards with 4
MDRAM chips. And this assumes a best-case situation (=extremely long bursts
-- the MDRAMs use a shared address/data bus, much like the PCI bus does). In
the real world, unaligned accesses both from the PCI bus and the accelerator
will reduce the effective available bandwidth. The current ET6000 boards
peak out at about 225 MB/sec, with 2 or 4 MDRAMs.</p>
<p>Whatever you may have read in press releases, the ET6000 has a 32-bit memory
bus (not 128 bits; that's only the accelerator data path within the chip, if
anything). That means that, with their 16-bit busses, 2 MDRAM chips already
use the full bus capacity. Having 4 memory chips on an ET6000 board will not
give you extra memory bandwidth.</p>
<p>Memory bandwidth limits the maximum resolution you can use at a given color
depth. The ET6000 RAMDAC can cope with 135 MHz in any situation. But the RAM
cannot. At 32bpp (sparse 16M color mode), using a 135 MHz pixel clock would
require a memory bandwidth of 135*4 = 540 MB/sec, which the current ET6000
boards simply cannot cope with. And then you still need some spare bandwidth
for the PCI bus and the accelerator.</p>
<p>That is why some modes will be refused, depending on your MDRAM memory
layout, even if the amount of memory would permit such a mode. See also the
trouble shooting section to see what can happen if too little memory
bandwidth is available.</p>

 <HR NOSHADE>
<A HREF="tseng.html"><EM> Information for Tseng Chipset Users</EM></A>
 <b>:</b> <EM>ET6000 memory bandwidth hype and the impact on video modes </EM><BR>
<b>Previous:</b> <A HREF="tseng12.html"><EM>ET6000 memory size facts and fiction </EM></A><BR>
<b>Next:</b> <A HREF="tseng14.html"><EM>Linear addressing and 16bpp/24bpp/32bpp modes </EM></A>



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