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<A HREF="chips.html"><EM> Information for Chips and Technologies Users</EM></A>
 <b>:</b> <EM>XF86Config Options </EM><BR>
<b>Previous:</b> <A HREF="chips2.html"><EM>Supported Chips </EM></A><BR>
<b>Next:</b> <A HREF="chips4.html"><EM>Modelines </EM></A>


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  <H2><A NAME="3"></A>3. XF86Config Options </H2>

<p>The following options are of particular interest to the Chips
and Technologies driver.  Each of them must be specified in the
`svga' driver section of the XF86Config file, within the Screen
subsections of the depths to which they are applicable (you can enable
options for all depths by specifying them in the Device section).</p>
<p>
<dl>
<dt><b>Option "noaccel"</b><dd><p>This option will disable the use of any accelerated functions.
This is likely to help with some problems related to DRAM
timing, high dot clocks, and bugs in accelerated functions, at
the cost of performance (which will still be reasonable on VLB/PCI).</p>
<dt><b>Option "no_bitblt" (Chips 65545 and later)</b><dd><p>This option will disable the use of the BitBLT engine which the
65545 and above have. If you can use the  "<code>noaccel</code>" option
to correct a problem, then this option might be better to use.
It still allows the use of generic speedups.</p>
<dt><b>Option "xaa_no_color_exp" (Chips 65545 and later)</b><dd><p>This option will have the effect of disabling the use
of monochrome colour expansion. In particular this effects
text and bitmaps. It is useful for problems related to image writes,
and possible acceleration problems. In general this will result in
a reduced performance. Note that this option replaces the 
"<code>no_imageblt</code>" option used in XFree86 3.2.</p>
<dt><b>Option "xaa_benchmark" (Chips 65545 and later)</b><dd><p>Turns on the XAA acceleration benchmarks. Information regarding
what graphics primitives are accelerated and their relatives
speeds will be printed when the X server starts.</p>
<dt><b>videoram 1024 (or another value)</b><dd><p>This option will override the detected amount of video memory,
and pretend the given amount of memory is present on the card.
Note that many ct655xx chips only allow up to 1Mb of videoram,
and the amount should be correctly detected.</p>
<dt><b>Option "nolinear" (Chips 65530 and later)</b><dd><p>By default linear addressing is used on all ct655xx chips.
However this might be broken in some implementations. It
is possible to turn the linear addressing off with this
option. Note that H/W acceleration and 16/24/32bpp are only
supported with linear addressing.</p>
<dt><b>MemBase 0x03b00000 (or a different address)</b><dd><p>This sets the physical memory base address of the linear
framebuffer. Typically this is probed correctly, but if
you believe it to be mis-probed, this option might help.
Also for non PCI machines specifying this force the linear base
address to be this value, reprogramming the video processor
to suit. Note that for the 65530 this is required as the
base address can't be correctly probed.</p>
<dt><b>Option "hw_cursor" (Chips 65545 and later)</b><dd><p>This option enables the use of a hardware accelerated cursor. This
effectively speeds all graphics operations as the job of ensuring that
the cursor remains on top is now given to the hardware. It also
reduces the effect of cursor flashing during graphics operations.</p>
<dt><b>Option "sw_cursor" (Chips 65545 and later)</b><dd><p>Software cursors have now been made the default and so this option
has no effect.</p>
<dt><b>Option "STN"</b><dd><p>The server is unable to differentiate between SS STN 
and TFT displays. This forces it to identify the display
as a SS STN rather than a TFT.</p>
<dt><b>Option "use_modeline"</b><dd><p>The flat panel timings are related to the panel size and not the
size of the mode specified in XF86Config. For this reason the
default behaviour of the server is to use the panel timings already
installed in the chip. The user can force the panel timings to be
recalculated from the modeline with this option. However the panel
size will still be probed.</p>
<dt><b>Option "fix_panel_size"</b><dd><p>For some machines the LCD panel size is incorrectly probed from
the registers. This option forces the LCD panel size to be
overridden by the modeline display sizes. This will prevent the
use of a mode that is a different size than the panel. Before
using this check that the server reports an incorrect panel
size. This option can be used in conjunction with the option
"use_modeline" to program all the panel timings using
the modeline values.</p>
<dt><b>Option "no_stretch"</b><dd><p>When the size of the mode used is less than the panel size, the
default behaviour of the server is to stretch the mode in an attempt
to fill the screen. A "<code>letterbox</code>" effect with no stretching
can be achieved using this option.</p>
<dt><b>Option "lcd_center"</b><dd><p>When the size of the mode used is less than the panel size, the
default behaviour of the server is to align the left hand edge of
the display with the left hand edge of the screen. Using this option
the mode can be centered in the screen. This option is reported to
have problems with some machines at 16/24/32bpp, the effect of which
is that the right-hand edge of the mode will be pushed off the screen.</p>
<dt><b>Option "hw_clocks" (Chips 65535 and later)</b><dd><p>On chips 65535 and later, the default is to use the programmable
clock for all clocks. It is possible to use the fixed clocks
supported by the chip instead by using this option. Typically
this will give you some or all of the clocks 25.175, 28.322,
31.000 and 36.000MHz. The current programmable clock will be
given as the last clock in the list. On a cold-booted system this
might be the appropriate value to use at the text console (see the 
"<code>TextClockFreq</code>" option), as many flat panels will need a
dot clock different than the default to synchronise. The
programmable clock makes this option obsolete and so it's use
isn't recommended.</p>
<dt><b>Option "use_vclk1" (Chips 65550 and later)</b><dd><p>The HiQV series of chips have three programmable clocks. The
first two are usually loaded with 25.175 and 28.322MHz for
VGA backward compatibility, and the third is used as a fully
programmable clock. On at least one system (the Inside 686 LCD/S
single board computer) the third clock is unusable. This option
forces the use of VClk1 as the programmable clock. It has been
reported that this option can fix the blue/black screen problem
on startup that a few machines suffer. </p>

<dt><b>TextClockFreq 25.175</b><dd><p>It is impossible for the server to read the value of the currently
used frequency for the text console from the chip with the ct6554x
series of chips. Therefore the server uses a default value of
25.175MHz as the text console clock. For some LCDs, in particular
DSTN screens, this clock will be wrong. This allows the user to
select a different clock for the server to use when returning to
the text console.</p>
<dt><b>Option "mmio"</b><dd><p>This enables the use of memory-mapped I/O to talk to the BitBLT
engine. By default memory-mapped I/O is not enabled on the
6554x series of chips, and is only usable on 6554x's with PCI
buses. This option has no effect when not using the BitBLT engine
(e.g. when using "<code>no_bitblt</code>"), or for the 65550 which can
only use MMIO for access to the BitBLT engine. On 65545 PCI
machines MMIO is enabled by default because the blitter can not
be used otherwise.</p>
<dt><b>Option "suspend_hack"</b><dd><p>This option sets the centering and stretching to the bios
default values. This can fix suspend/resume problems on some
machines. It overrides the options "lcd_center" 
and "no_stretch".</p>
<dt><b>Option "use_18bit_bus"  (Chips 65540/45/46/48)</b><dd><p>For 24bpp on TFT screens, the server assumes that a 24bit bus
is being used. This can result in a reddish tint to 24bpp mode.
This option, selects an 18 bit TFT bus. For other depths this
option has no effect.</p>
<dt><b>Chipset "ct65546" (or some other chip)</b><dd><p>It is possible that the chip could be misidentified, particular
due to interactions with other drivers in the server. It is
possible to force the server to identify a particular chip with
this option.</p>
<dt><b>Option "sync_on_green" (Chips 65550/54/55 and 68554)</b><dd><p>Composite sync on green. Possibly useful if you wish to use an
old workstation monitor. The 65550/54 internal RAMDAC's support
this mode of operation, but whether a particular machine does
depends on the manufacturer. </p>
<dt><b>Option "fast_dram" (Chips 65550/54/55 and 68554)</b><dd><p>This option sets the internal memory clock (MCLK) registers to 38MHz.
The default value programmed by the BIOS is usually OK, but some
machines can accept a faster MClk to achieve a better performance.
One machine known to work well with this option is the Toshiba 720CDT.
Note that newer machines often have an MClk greater than 38MHz, and
so this option might actually slower the machine down. This option
is generally not recommended and is superseded by the
"<code>Set_MemClk</code>" option.</p>
<dt><b>DacSpeed 80.000</b><dd><p>The server will limit the maximum dotclock to a value as specified
by the manufacturer. This might make certain modes impossible
to obtain with a reasonable refresh rate. Using this option the
user can override the maximum dot-clock and specify any value they
prefer. Use caution with this option, as driving the video processor
beyond its specifications might cause damage.</p>
<dt><b>Set_MemClk 38.000 (Chips 65550/54/55 and 68554)</b><dd><p>This option sets the internal memory clock (MCLK) registers to 38MHz
or some other value. Use caution as excess heat generated by
the video processor if its specifications are exceeded might cause
damage. However careful use of this option might boost performance.</p>
</dl>
</p>

 <HR NOSHADE>
<A HREF="chips.html"><EM> Information for Chips and Technologies Users</EM></A>
 <b>:</b> <EM>XF86Config Options </EM><BR>
<b>Previous:</b> <A HREF="chips2.html"><EM>Supported Chips </EM></A><BR>
<b>Next:</b> <A HREF="chips4.html"><EM>Modelines </EM></A>



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