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<A HREF="ark.html"><EM> Information for ARK Logic Chipset Users</EM></A>
 <b>:</b> <EM>Supported RAMDACs </EM><BR>
<b>Previous:</b> <A HREF="ark1.html"><EM>Supported chipsets </EM></A><BR>
<b>Next:</b> <A HREF="ark3.html"><EM>Acceleration </EM></A>


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  <H2><A NAME="2"></A>2. Supported RAMDACs </H2>

<p>If no RAMDAC is specified, a standard RAMDAC supporting 256 colors up
to 80 MHz dot clock frequency is assumed. The following RAMDAC types
can be specified in the Device section of the XF86Config file (e.g.
<code>Ramdac "att20c490"</code>):
<dl>
<dt><b>att20c490</b><dd><p>Industry-standard 8-bit RAMDAC. The RAMDAC used
on the basic Hercules Stingray Pro is compatible. 16bpp color
depth is supported up to 40 or 55 MHz, depending on the DAC
speed rating. Packed 24bpp is supported up to about 36 MHz.</p>
<dt><b>att20c498</b><dd><p>Industry-standard 16-bit RAMDAC. The RAMDAC used
on the Hercules Stingray Pro/V and the Stingray 64/V is
compatible. 16bpp is supported up to 80 MHz or 110 MHz dot clock
frequency, 32bpp is supported up to 40 or 55 MHz.</p>
<dt><b>zoomdac</b><dd><p>This is the actual DAC used by the Hercules Stingray Pro/V and 64/V.
It is treated mostly as an ATT20C498, but with dot clock limits
set correctly (16bpp up to 55 MHz with ARK1000PV, up to at least
110 MHz with ARK2000PV). In addition, packed 24bpp is supported
(up to 36 MHz with ARK1000PV, not yet on the ARK2000PV),
and 32bpp is also supported on the ARK2000PV (up to 55 MHz)
This RAMDAC should be auto-detected.</p>
<dt><b>stg1700</b><dd><p>Completely untested.</p>
<dt><b>ics5342</b><dd><p>This is a clockchip/RAMDAC combination and is used on the Diamond
Stealth 64 Graphics 2001 and newer Hercules cards that use the
ARK2000MT. It is supported at 16bpp and 32bpp in addition to 256
color mode. 32bpp mode may not work.</p>
</dl>

The Dacspeed keyword can be used to indicate the speed rating of the RAMDAC,
but it must be used with care. The raw clock frequency may exceed 80 MHz.
Both the ARK chips and some of the RAMDACs are specified for raw speeds up
to 120 MHz, but this might violate FCC regulations or otherwise be unstable.
High dot clock 8bpp modes (e.g. 135 MHz) are normally achieved by
sending 2 pixels at at time over a 16-bit DAC path (the raw clock would be
67.5 MHz for 135 MHz dot clock), a mode of operation that is not yet
supported by this driver. No high-dot clock configurations
have been tested.</p>
<p>The driver now limits the maximum dot clocks according to the DRAM speed
(bandwidth). Because it is not possible to determine the memory clock
speed (except on the ICS5342), the driver assumes a default of 60 MHz.
On an ARK1000PV, that allows 8bpp up to 109 MHz, 16bpp up to 55 MHz,
24bpp up to 36 MHz, and 32bpp up to 27 MHz. On an ARK2000PV with 2MB
memory, it allows 16bpp up to 110 MHz, 24bpp up to 72 MHz, and 32bpp up
to 55 MHz. If you know what your real memory clock is, you can specify
it with the <code>MCLK</code> keyword, for example <code>MCLK 70</code>.</p>
<p>To run <code>XF86_SVGA</code> at 16 bpp, pass options to the X server as
follows:
<pre>
startx -- -bpp 16               5-6-5 RGB ('64K color', XGA)
startx -- -bpp 16 -weight 555   5-5-5 RGB ('Hicolor')
startx -- -bpp 24		8-8-8 RGB (packed 24-bit truecolor)
startx -- -bpp 32		8-8-8 RGB (32-bit pixel truecolor)
</pre>
</p>

 <HR NOSHADE>
<A HREF="ark.html"><EM> Information for ARK Logic Chipset Users</EM></A>
 <b>:</b> <EM>Supported RAMDACs </EM><BR>
<b>Previous:</b> <A HREF="ark1.html"><EM>Supported chipsets </EM></A><BR>
<b>Next:</b> <A HREF="ark3.html"><EM>Acceleration </EM></A>



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