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TrueTime GPS/GOES/OMEGA Receivers
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TrueTime GPS/GOES/OMEGA Receivers
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<p><h4>Synopsis</h4>

<p>Address: 127.127.5.<var>u</var>
<br>Reference ID: GPS, OMEGA, GOES
<br>Driver ID: TRUETIME
<br>Serial Port: <code>/dev/true<var>u</var></code>; 9600 baud, 8-bits,
no parity
<br>Features: <code>tty_clk</code>

<p><h4>Description</h4>

<p>This driver supports several models models of Kinemetrics/TrueTime
timing receivers, including 468-DC MK III GOES Synchronized Clock, GPS-
DC MK III and GPS/TM-TMD GPS Synchronized Clock, XL-DC (a 151-602-210,
reported by the driver as a GPS/TM-TMD), GPS-800 TCU (an 805-957 with
the RS232 Talker/Listener module), OM-DC OMEGA Synchronized Clock, and
very likely others in the same model family that use the same timecode
formats.

<p>Most of this code is originally from refclock_wwvb.c with thanks. It
has been so mangled that wwvb is not a recognizable ancestor.

<pre>
Timcode format: ADDD:HH:MM:SSQCL

A - control A (this is stripped before we see it)
Q - Quality indication (see below)
C - Carriage return
L - Line feed

Quality codes indicate possible error of

        468-DC GOES Receiver:
        GPS-TM/TMD Receiver:
                ? +/- 500 milliseconds  # +/- 50 milliseconds
                * +/- 5 milliseconds    . +/- 1 millisecond
                space less than 1 millisecond

        OM-DC OMEGA Receiver:

                &gt; +/- 5 seconds

                ? +/- 500 milliseconds  # +/- 50 milliseconds
                * +/- 5 milliseconds    . +/- 1 millisecond

                A-H less than 1 millisecond. Character indicates which
station
                is being received as follows: A = Norway, B = Liberia,
                C = Hawaii, D = North Dakota, E = La Reunion, F =
Argentina,
                G = Australia, H = Japan.
</pre>

<p>The carriage return start bit begins on 0 seconds and extends to 1
bit time.

<p>Notes on 468-DC and OMEGA receiver:
<p>Send the clock a <code>R</code> or <code>C</code> and once per second
a timestamp will appear. Send a <code>R</code> to get the satellite
position once (GOES only).

<p>Notes on the 468-DC receiver:

<p>Since the old east/west satellite locations are only historical, you
can't set your clock propagation delay settings correctly and still use
automatic mode. The manual says to use a compromise when setting the
switches. This results in significant errors. The solution; use fudge
time1 and time2 to incorporate corrections. If your clock is set for 50
and it should be 58 for using the west and 46 for using the east, use
the line

<p><code>fudge 127.127.5.0 time1 +0.008 time2 -0.004</code>

<p>This corrects the 4 milliseconds advance and 8 milliseconds retard
needed. The software will ask the clock which satellite it sees.

<p>The PCL720 from PC Labs has an Intel 8253 look-alike, as well as a
bunch of TTL input and output pins, all brought out to the back panel.
If you wire a PPS signal (such as the TTL PPS coming out of a GOES or
other Kinemetrics/Truetime clock) to the 8253's GATE0, and then also
wire the 8253's OUT0 to the PCL720's INPUT3.BIT0, then we can read CTR0
to get the number of microseconds since the last PPS upward edge,
mediated by reading OUT0 to find out if the counter has wrapped around
(this happens if more than 65535us (65ms) elapses between the PPS event
and our being called.)

<p><h4>Monitor Data</h4>

<p>When enabled by the <code>flag4</code> fudge flag, every received
timecode is written as-is to the <code>clockstats</code> file.

<p><h4>Fudge Factors</h4>

<dl>

<dt><code>time1 <i>time</i></code>
<dd>Specifies the time offset calibration factor, in seconds and
fraction, to be used for the West satellite, with default 0.0.

<p><dt><code>time2 <i>time</i></code>
<dd>. Specifies the time offset calibration factor, in seconds and
fraction, to be used for the East satellite, with default 0.0.

<p><dt><code>stratum <i>number</i></code>
<dd>Specifies the driver stratum, in decimal from 0 to 15, with default
0.

<p><dt><code>refid <i>string</i></code>
<dd>Specifies the driver reference identifier, an ASCII string from one
to four characters, with default <code>TRUE</code>.

<p><dt><code>flag1 0 | 1</code>
<dd>Silence the clock side of xntpd, just reading the clock without
trying to write to it.

<p><dt><code>flag2 0 | 1</code>
<dd>Generate a debug file /tmp/true%d.

<p><dt><code>flag3 0 | 1</code>
<dd>Enable <code>ppsclock</code> line discipline/streams module if set.

<p><dt><code>flag4 0 | 1</code>
<dd>Enable <code>clockstats</code> recording if set.
</dl>

<p>Additional Information

<p><a href="refclock.html"> Reference Clock Drivers</a>

<hr><address>David L. Mills (mills@udel.edu)</address></body></html>
